H8S2110B Datasheet, PDF (89/559 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series

Section 3 MCU Operating Modes
3.2.2 System Control Register (SYSCR)
SYSCR selects a system pin function, monitors a reset source, selects the interrupt control mode
and the detection edge for NMI, pin location selection, enables or disables register access to the
on-chip peripheral modules, and enables or disables on-chip RAM address space.
Bit Bit Name Initial Value R/W Description
7—
All 0
and
6
R/W Reserved
The initial value should not be changed.
5 INTM1
0
4 INTM0
0
R
These bits select the control mode of the interrupt
R/W ^{controller. For details on the interrupt control modes}
and interrupt control select modes 1 and 0, see
section 5.6, Interrupt Control Modes and Interrupt
Operation.
00: Interrupt control mode 0
01: Interrupt control mode 1
10: Setting prohibited
11: Setting prohibited
3 XRST
1
R
External Reset
This bit indicates the reset source. A reset is caused
by an external reset input, or when the watchdog
timer overflows.
0: A reset is caused when the watchdog timer
overflows.
1: A reset is caused by an external reset.
2
NMIEG
0
R/W NMI Edge Select
Selects the valid edge of the NMI interrupt input.
0: An interrupt is requested at the falling edge of NMI
input
1: An interrupt is requested at the rising edge of NMI
input
Rev. 2.00 Mar 21, 2006 page 51 of 518
REJ09B0299-0200