H8S2110B Datasheet, PDF (129/559 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series

Section 7 I/O Ports
Section 7 I/O Ports
7.1 Overview
This LSI has eleven I/O ports (ports 1 to 9*, A, and B).
Table 7.1 is a summary of the port functions. The pins of each port also have other functions.
Each port includes a data direction register (DDR) that controls input/output and data registers
(DR, ODR) that store output data.
Ports 1 to 3, 6, A, and B have an on-chip input pull-up MOS function. For ports A and B, the
on/off status of the input pull-up MOS is controlled by DDR and ODR. Ports 1 to 3 and 6 have an
input pull-up MOS control register (PCR), in addition to DDR, to control the on/off status of the
input pull-up MOS.
Ports 1 to 9*, A, and B can drive a single TTL load and 30 pF capacitive load. All the I/O ports
can drive a Darlington transistor when in output mode. Ports 1 to 3 can drive an LED (10 mA sink
current).
Port A input and output use by the VccB power supply, which is independent of the Vcc power
supply. When the VccB voltage is 5V, the pins on port A will be 5-V tolerant.
PA4 to PA7 of port A have bus-buffer drive capability.
P52 in port 5, P97 in port 9, P86 in port 8 and P42 in port 4 are NMOS push-pull outputs. P52,
P97, P86 and P42 are thus 5-V tolerant, with DC characteristics that are dependent on the Vcc
voltage.
For the P42, P52/ExSCK1, P86/SCK1, and P97 outputs, connect pull-up resistors to pins to raise
output-high-level voltage.
Note: * The program development tool (emulator) does not support the output of port 7.
Rev. 2.00 Mar 21, 2006 page 91 of 518
REJ09B0299-0200