H8S33 Datasheet, PDF (852/1489 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 17 Smart Card Interface
SCMR is initialized to H'F2 by a reset and in hardware standby mode.
Bits 7 to 4—Reserved: These bits are always read as 1 and cannot be modified.
Bit 3—Smart Card Data Transfer Direction (SDIR): Selects the serial/parallel conversion
format.
Bit 3
SDIR
0
1
Description
TDR contents are transmitted LSB-first
Receive data is stored in RDR LSB-first
TDR contents are transmitted MSB-first
Receive data is stored in RDR MSB-first
(Initial value)
Bit 2—Smart Card Data Invert (SINV): Specifies inversion of the data logic level. This
function is used together with the SDIR bit for communication with an inverse convention card.
The SINV bit does not affect the logic level of the parity bit. For parity-related setting procedures,
see section 17.3.4, Register Settings.
Bit 2
SINV
0
1
Description
TDR contents are transmitted as they are
Receive data is stored as it is in RDR
TDR contents are inverted before being transmitted
Receive data is stored in inverted form in RDR
(Initial value)
Bit 1—Reserved: This bit is always read as 1 and cannot be modified.
Bit 0—Smart Card Interface Mode Select (SMIF): Enables or disables the Smart Card interface
function.
Bit 0
SMIF
0
1
Description
Smart Card interface function is disabled
Smart Card interface function is enabled
(Initial value)
Rev. 5.00 Mar 28, 2005 page 788 of 1422
REJ09B0234-0500