H8S33 Datasheet, PDF (792/1489 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 16 Serial Communication Interface (SCI, IrDA) (The H8S/2695 is not equipped with an IrDA function)
Table 16.4 BRR Settings for Various Bit Rates (Clocked Synchronous Mode)
φ=
Bit Rate ^{2 MHz}
(bit/s) n N
φ=
4 MHz
nN
φ=
8 MHz
nN
φ=
10 MHz
nN
φ=
16 MHz
nN
φ=
20 MHz
nN
φ=
25 MHz
nN
φ=
28 MHz
nN
110 3 70 — —
250 2 124 2 249 3 124 — —
3 249
500 1 249 2 124 2 249 — —
3 124 — —
3 218
1k
1 124 1 249 2 124 — —
2 249 — —
3 97
3 108
2.5 k 0 199 1 99 1 199 1 249 2 99
2 124 2 155
2 174
5k
0 99
0 199 1 99
1 124 1 199 1 249 2 77
1 349
10 k 0 49
0 99 0 199 0 249 1 99
1 124 1 155
1 174
25 k 0 19
0 39 0 79
0 99
0 159 0 199 0 249
0 279
50 k 0 9
0 19 0 39
0 49
0 79
0 99 0 124
0 139
100 k 0 4
09
0 19
0 24
0 39
0 49 0 62
0 69
250 k 0 1
03
07
09
0 15
0 19 0 24
0 27
500 k 0 0^*
01
03
04
07
09
——
0 13
1M
0 0^* 0 1
03
04
——
06
2.5 M
0 0^*
01
——
——
5M
0 0^* — —
——
Legend:
Blank: Cannot be set.
—: Can be set, but there will be a degree of error.
*:
Continuous transfer is not possible.
Note: As far as possible, the setting should be made so that the error is no more than 1%.
Rev. 5.00 Mar 28, 2005 page 728 of 1422
REJ09B0234-0500