H8S33 Datasheet, PDF (1251/1489 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Instruction Mnemonic
ROTXR
ROTXR.B Rd
ROTXR.B #2,Rd
ROTXR.W Rd
ROTXR.W #2,Rd
ROTXR.L ERd
ROTXR.L #2,ERd
RTE
RTE
RTS
RTS
SHAL
SHAL.B Rd
SHAL.B #2,Rd
SHAL.W Rd
SHAL.W #2,Rd
SHAL.L ERd
SHAL.L #2,ERd
SHAR
SHAR.B Rd
SHAR.B #2,Rd
SHAR.W Rd
SHAR.W #2,Rd
SHAR.L ERd
SHAR.L #2,ERd
SHLL
SHLL.B Rd
SHLL.B #2,Rd
SHLL.W Rd
SHLL.W #2,Rd
SHLL.L ERd
SHLL.L #2,ERd
SHLR
SHLR.B Rd
SHLR.B #2,Rd
SHLR.W Rd
SHLR.W #2,Rd
SHLR.L ERd
SHLR.L #2,ERd
SLEEP
SLEEP
Appendix A Instruction Set
Branch
Byte Word
Instruction Address Stack
Data Data Internal
Fetch
Read
Operation Access Access Operation
I
J
K
L
M
N
1
1
1
1
1
1
2
2/3^*1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Rev. 5.00 Mar 28, 2005 page 1187 of 1422
REJ09B0234-0500