M16C5LD_15 Datasheet, PDF (85/88 Pages) Renesas Technology Corp – RENESAS MCU

REVISION HISTORY
M16C/5LD Group, M16C/56D Group Datasheet
Rev.
1.10
1.20
Date
Dec.01, 2009
Nov. 25, 2011
Page
—
Overall
First edition issued
Description
Summary
Specified Renesas Electronics sales office as a contact.
Overall
Modified register names are as follows:
• 0075h “CAN0 Receive Completion Interrupt Control Register” to “CAN0 Reception
Complete Interrupt Control Register”
• 0076h “CAN0 Transmit Completion Interrupt Control Register” to “CAN0 Transmission
Complete Interrupt Control Register”
• 0071h “CAN0 Wakeup Interrupt Control Register” to “CAN0 Wake-up Interrupt Control
Register”
• 037Ch “Count Source Protect Mode Register” to “Count Source Protection Mode
Register”
Overall
Overview
Changed terminologies are as follows:
• “voltage detector 2” to “voltage monitor 2”
• “oscillation stop detection reset” to “oscillator stop detect reset”
• “detection circuit” to “detector”
• “Oscillation stop and re-oscillation detect” to “Oscillator stop/restart detect”
• “oscillation/oscillator circuit” to “oscillator”
• “oscillator” to “a crystal/ceramic resonator”
• “oscillator manufacturer” to “manufacturer of crystal/ceramic resonator”
• “on-chip oscillator oscillation circuit” to “on-chip oscillator”
3, 5 ^{Table 1.2, Table 1.4 Specifications (2/2) (80-pin, 64-pin):}
Added the Current Consumption row, and added note 1.
Figure 1.3, Figure 1.4 Block Diagram (80-pin, 64-pin):
• Deleted “8-bit” from the description for the UART/clock synchronous serial interface.
8, 9
• Deleted “(8-bit x 1 channel)” from the description for the Real-time clock.
• Added “(1 channel)” to the description for the Multi-master I²C-bus.
• Moved “dedicated 125 kHz on-chip oscillator for the watchdog timer” to description for
the watchdog timer.
10, 13 ^{Figure 1.5, Figure 1.6 Pin Assignments (80-pin, 64-pin):}
Added TSUDA and TSUDB to pins P8_0 and P8_1, respectively.
11, 14 ^{Table 1.7, Table 1.9 Pin Names (1/2) (80-pin, 64-pin):}
Added TSUDA and TSUDB to pins P8_0 and P8_1, respectively.
Table 1.11 Pin Functions (64-Pin and 80-Pin Packages) (1/2):
• Deleted “pin” or “pins” from “input pin/pins” and “output pin/pins”.
• Changed “low active input” to “input”.
• Added “Pins” to “AVCC and AVSS” in the Description column of the Analog power
supply row.
• Deleted “Low active input pin.” from the Reset input row.
16
• Changed the description in the Description column of the CNVSS row.
• Added footnote reference number (1) in the Sub clock input and output rows in the
Description column.
• Deleted “INT2 is used to input Z-phase of timer A” in the Description column of the INT
interrupt input row.
• Added UART0 to UART3 in the Signal Name column of the Serial interface row.
• Added UART2 to the Signal Name column of the I²C mode row.
Table 1.12 Pin Functions (64-Pin and 80-Pin Packages) (2/2):
• Deleted “pin” or “pins” from “input pin/pins” and “output pin/pins”.
• Changed “low active input” to “input”.
17
• Added “TSUDA, TSUDB” to the Pin Name in the Timer S row.
• Changed “Input pin” to “Receive data input” and “Output pin” to “Transmit data output”
in the Description column of the CAN Module row.
• In the Description column of the I/O port row, changed the explanation of the direction
register, and changed “4 input ports” to “4 bits”.
A- 1