H8S20103 Datasheet, PDF (817/992 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/Tiny Series

Section 22 Synchronous Serial Communication Unit (SSU)
22.3.6 Operation in Four-Line Bus Communication Mode
Four-line bus communication mode is a mode which communicates with the four-line bus; a clock
line, a data input line, a data output line, and a chip select line. This mode includes bidirectional
mode in which the data input line and the data output line function as a single pin. The data input
line and the data output line are changed according to the settings of the MSS bit in SSCRH and
BIDE bit in SSMR2. For details, see section 22.3.3, Relationship between Data Input/Output Pin
and Shift Register. In this mode, relationship between clock polarity and phase, and data can be set
by the CPOS and CPHS bits in SSMR. For details, see section 22.3.2, Relationship between Clock
Polarity and Phase, and Data.
When the SSU is set as a master device, the chip select line controls output. When the SSU is set
as a slave device, the chip select line controls input. When the SSU is set as a master device, the
chip select line controls output of the SCS pin or controls output of a general port by setting the
CSS1 bit in SSMR2 to 1. When the SSU is set as a slave device, the chip select line sets the SCS
pin as an input pin by setting the CSS1 and CSS0 bits in SSMR2 to 01.
In four-line bus communication mode, the MLS bit in SSMR is set to 1 and transfer is performed
in MSB-first order.
(1) Initialization in Four-Line Bus Communication Mode
Figure 22.10 shows the initialization in four-line bus communication mode. Before transmitting
and receiving data, the TE and RE bits in SSER should be cleared to 0, then the SSU should be
initialized.
Note:
When the operating mode, or transfer format, is changed for example, the TE and RE bits
must be cleared to 0 before making the change using the following procedure. Note that
clearing the RE bit to 0 does not change the contents of the RDRF and ORER flags, or the
contents of SSRDR.
Rev. 1.00 Oct. 03, 2008 Page 791 of 962
REJ09B0465-0100