PD46365092B_15 Datasheet, PDF (8/36 Pages) Renesas Technology Corp – 36M-BIT QDRTM II SRAM 2-WORD BURST OPERATION

μPD46365092B, μPD46365182B, μPD46365362B
Block Diagram
[μPD46365092B]
21
ADDRESS
R#
ADDRESS
21
W#
REGISTRY
& LOGIC
K
K#
W#
BW0#
9
D0 to D8
R#
K
K#
DATA
18
REGISTRY
& LOGIC
K
[μPD46365182B]
20
ADDRESS
R#
ADDRESS
20
W#
REGISTRY
& LOGIC
K
K#
W#
BW0#
BW1#
18
DATA
36
D0 to D17
REGISTRY
& LOGIC
R#
K
K#
K
[μPD46365362B]
19
ADDRESS
R#
ADDRESS
19
W#
REGISTRY
& LOGIC
K
K#
W#
BW0#
BW1#
BW2#
BW3#
DATA
72
36
REGISTRY
D0 to D35
& LOGIC
R#
K
K#
K
2²¹ x 18
MEMORY
ARRAY
2²⁰ x 36
MEMORY
ARRAY
2¹⁹ x 72
MEMORY
ARRAY
R10DS0089EJ0400 Rev.4.00
Nov 09, 2012
18
18
MUX
K
C, C#
OR
K, K#
36
36
MUX
K
C, C#
OR
K, K#
72
72
MUX
K
C, C#
OR
K, K#
9
Q0 to Q8
2
CQ,
CQ#
18
Q0 to Q17
2
CQ,
CQ#
36
Q0 to Q35
2
CQ,
CQ#
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