PD46365092B_15 Datasheet, PDF (16/36 Pages) Renesas Technology Corp – 36M-BIT QDRTM II SRAM 2-WORD BURST OPERATION

μPD46365092B, μPD46365182B, μPD46365362B
Capacitance (TA = 25°C, f = 1 MHz)
Parameter
Symbol Test conditions
Input capacitance (Address, Control)
CIN VIN = 0 V
Input / Output capacitance
CI/O VI/O = 0 V
(D, Q, CQ, CQ#)
Clock Input capacitance
Cclk Vclk = 0 V
Remark These parameters are periodically sampled and not 100% tested.
MIN.
Thermal Characteristics
Parameter
Thermal resistance
from junction to ambient air
Symbol
Substrate
θ ja 4-layer
8-layer
Thermal characterization parameter Ψ jt 4-layer
from junction to the top center
of the package surface
8-layer
Thermal resistance
θ jc
from junction to case
Airflow
0 m/s
1 m/s
0 m/s
1 m/s
0 m/s
1 m/s
0 m/s
1 m/s
MAX.
5
7
6
TYP.
16.5
13.2
15.5
12.6
0.07
0.13
0.06
0.12
3.86
Unit
pF
pF
pF
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
R10DS0089EJ0400 Rev.4.00
Nov 09, 2012
Page 16 of 35