HD74LV595A Datasheet, PDF (8/14 Pages) Hitachi Semiconductor – 8-bit Shift Registers with 3-state Outputs

HD74LV595A
Switching Characteristics (cont)
Item
Maximum
lock frequency
Propagation
delay time
Enable time
Disable time
Setup time
Hold time
Pulse width
Symbol
f_max
t_PLH/t_PHL
t_PHL
t_ZH
t_ZL
t_HZ
t_LZ
t_SU
Ta = 25°C
Min Typ
135 185
95 155
— 6.2
— 7.7
— 5.4
— 6.9
— 5.9
— 7.4
— 4.8
— 8.3
— 4.8
— 7.6
3.0 —
5.0 —
5.0 —
2.5 —
t_h
2.0 —
0.0 —
0.0 —
t_w
5.0 —
5.0 —
5.0 —
Ta = –40 to 85°C
Test
FROM
Max Min Max
Unit _{Conditions (Input)}
V_CC = 5.0 ± 0.5 V
TO
(Output)
— 115 —
— 85
—
8.2 1.0 9.4
10.2 1.0 11.4
7.4 1.0 8.5
9.4 1.0 10.5
8.0 1.0 9.1
10.0 1.0 11.1
8.6 1.0 10.0
10.6 1.0 12.0
8.6 1.0 10.0
11.0 1.0 11.0
— 3.0 —
MHz
ns
ns
ns
ns
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
SRCLK
RCLK
SRCLK
G
Q_H'
Q_A – Q_H
Q_H'
Q_A – Q_H
SER before SRCLK ↑
— 5.0 —
SRCLK ↑ before RCLK ↑
— 5.0 —
SRCLR low before RCLK ↑
— 2.5 —
SRCLR high (inactive)
before SRCLK ↑
— 2.0 —
ns
SER after SRCLK ↑
— 0.0 —
SRCLK ↑ after RCLK ↑
— 0.0 —
SRCLR low after RCLK ↑
— 5.0 —
ns
RCLK high or low
— 5.0 —
SRCLK high or low
— 5.0 —
SRCLR low
Output-skew Characteristics
Ta = 25°C
Ta = –40 to 85°C
C_L = 50 pF
Item
Symbol
V_CC = (V) _Min
Max
Min
Max
Unit
Output skew
t_{sk (O)}
2.3 to 2.7 —
3.0 to 3.6 —
2.0
—
1.5
—
2.0
ns
1.5
4.5 to 5.5 —
1.0
—
1.0
Note: Skew between any outputs of the same package switching in the same direction. This parameter is warranted
but not production tested.
Rev.2.00 Jun. 28, 2004 page 8 of 13