TLV320AIC3204 Datasheet, PDF (72/159 Pages) Texas Instruments – Ultra Low Power Stereo Audio Codec

TLV320AIC3204
Ultra Low Power Stereo Audio Codec
SLOS602A – SEPTEMBER 2008 – REVISED OCTOBER 2008
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Because the output signal is a pulse train switching between Power Supply and Ground, the efficiency of
the amplifier is greatly improved. In this mode however, for good noise performance, care should be taken
to keep the analog power supply clean.
For using the Class-D mode of operation, the following clock-divider condition should be met:
MDAC = I × 4, where I = 1, 2, ..., 32
When a direct digital pulse train is driven out as a signal, high frequencies as a function of pulse train
frequency are also present which lead to power waste. To increase the efficiency and reduce power
dissipation in the load due to these high frequencies, an LC filter should be used in series with the output
and the load. The cutoff frequency of the LC filter should be adjusted to allow audio signals below 20kHz
to pass through, but highly attenuate the high-frequency signal content.
L = 82 mH
C_C = 47 mF
C = 1 mF
Rload = 32 W
Figure 5-37. Configuration for Using Headphone Amplifier in Class-D Mode
For using the headphones in the Class-D mode of operation, the headphones should first be powered up
in default Class-AB mode to charge the AC-coupling capacitor to the set common mode voltage. Once the
headphone amplifiers have been so powered up, the DAC should be routed to headphones and unmuted
before they can be switched to the Class-D mode. After Class D mode has been turned on, the linear,
Class AB mode amplifier must be turned off. For powering down the headphone amplifiers, the DAC
should first be muted.
5.12.3 Line Out Amplifier
The stereo line level drivers on LOL and LOR pins can drive a wide range of line level resistive
impedances in the range of 600Ω to 10kΩ. The output common modes of line level drivers can be
configured to equal either the analog input common-mode setting, or 1.65V by programming Page 1,
Register 3, D(3). With output common-mode setting of 1.65V and LDOIN supply at 3.3V the line-level
drivers can drive up to 1Vrms output signal. The line-level drivers can drive out a mixed combination of
DAC signal and attenuated ADC PGA signal. The signal mixing can be configured by programming Page
1, Register 14 and 15. Additionally, the two line-level drivers can be configured to act as a mono
differential line level driver by routing output of LOR to LOL ( Page 1, Register 14, D(0) = ‘1’).
The output of DAC can be simultaneously played back to the stereo headphone drivers as well as stereo
line- level drivers. In such a case, the DAC signal at the headphone outputs and line outputs are
out-of-phase with respect to each other.
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Application Information
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