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R1LV0216BSB Datasheet, PDF (7/16 Pages) Renesas Technology Corp – 2Mb Advanced LPSRAM (128k word x 16bit)
R1LV0216BSB
Read Cycle
Parameter
Read cycle time
Address access time
Chip select access time
Output enable to output valid
Output hold from address change
LB#, UB# access time
Chip select to output in low-Z
LB#, UB# enable to low-Z
Output enable to output in low-Z
Chip deselect to output in high-Z
LB#, UB# disable to high-Z
Output disable to output in high-Z
R1LV0216BSB-5S*
R1LV0216BSB-7S*
Symbol
Unit
Note
Min.
Max.
Min.
Max.
tRC
55
-
70
-
ns
tAA
-
55
-
70
ns
tACS
-
55
-
70
ns
tOE
-
30
-
35
ns
tOH
10
-
10
-
ns
tBA
-
55
-
70
ns
tCLZ
10
-
10
-
ns
2,3
tBLZ
10
-
10
-
ns
2,3
tOLZ
5
-
5
-
ns
2,3
tCHZ
0
20
0
25
ns
1,2,3
tBHZ
0
20
0
25
ns
1,2,3
tOHZ
0
20
0
25
ns
1,2,3
R10DS0051EJ0100 Rev.1.00
2011.03.30
Page 7 of 14