HD74CDCV857 Datasheet, PDF (7/13 Pages) Hitachi Semiconductor – 2.5-V Phase-lock Loop Clock Driver

HD74CDCV857
Electrical Characteristics
Item
Symbol Min
Typ ^*1 Max Unit Test Conditions
Input clamp CLK, CLK
V_IK
—
—
–1.2 V
I_I = –18 mA, V_DDQ = 2.3 V
voltage
FBIN, FBIN, G
Output voltage
V_OH
V_DDQ– —
—
V
I_OH = –100 µA, V_DDQ = 2.3 to 2.7
0.2
V
1.7
—
—
I_OH = –12 mA, V_DDQ = 2.3 V
V_OL
—
—
0.2
I_OL = 100 µA, V_DDQ = 2.3 to 2.7 V
Input current
Input capacitance
Delta input capacitance
Supply current
Supply current in power
down mode
I_I
C_I
C_DI
DI_CC
AI_CC
I_CCpd
—
—
—
—
2.5
—
–0.25 —
—
250
—
9
—
—
0.6
±10
3.5
0.25
300
12
100
I_OL = 12 mA, V_DDQ = 2.3 V
µA V_I = 0 V to 2.7 V, V_DDQ = 2.7 V
pF CLK and CLK, FBIN and FBIN
pF CLK and CLK, FBIN and FBIN
mA f = 170 MHz, V_DDQ = AV_CC = 2.7 V,
All Yx, Yx pin = open
µA
Note: 1. For conditions shown as Min or Max, use the appropriate value specified under recommended
operating conditions.
Rev.7.00, Oct.09.2003, page 7 of 12