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HD74CDCV857 Datasheet, PDF (11/13 Pages) Hitachi Semiconductor – 2.5-V Phase-lock Loop Clock Driver
HD74CDCV857
Yx, FBOUT
Yx, FBOUT
t half cycle n
t half cycle n+1
t HCC = t half cycle n - t half cycle n+1
Figure 8 Half cycle to cycle jitter
V DDQ
AVCC
Device
under OUT
test
OUT
AGND
GND
VDDQ /2
AVCC/2
Z = 60 Ω
Z = 60 Ω
-VDDQ /2
C=
14 pF
-VDDQ /2
C=
14 pF
-VDDQ /2
RT=
10 Ω
RT=
10 Ω
Z = 50 Ω
Z = 50 Ω
V DDQ
AVCC
Device
under OUT
test
OUT
AGND
GND
VDDQ
AVCC
Z = 60 Ω
Z = 60 Ω
RT=
120 Ω
C=
14 pF
C=
14 pF
Figure 9 Output load test circuit
Oscillo
scope
RT=
50 Ω
RT=
50 Ω
Rev.7.00, Oct.09.2003, page 11 of 12