R01DS0140ED0100_FJ4_15 Datasheet, PDF (65/78 Pages) Renesas Technology Corp – 32-bit Single-Chip Microcontroller

Chapter 7
7.16.7 Equivalent circuit
ADCAnIm
(n=0, m=0-23)
(n=1, m=0-23)
Peripherals specification
R_IN
C_IN
Terminals
ADCA0I0-ADCA0I5
ADCA0I6-ADCA0I23
ADCA1I0-ADCA1I23
Condition
When S&H is used
When S&H is not
used
ADA0BPC=0
ADA0BPC=1
ADA0BPC=0
ADA0BPC=1
ADA0BPC=0
ADA0BPC=1
R_IN[kΩ]
0.7
1.6
1.5
1.2
1.1
1.2
1.1
C_IN[pF]
3.6
12.6
7.1
11.9
7.1
11.9
7.1
Caution These specifications are not tested in outgoing inspection. Therefore R_IN and
C_IN values are not guaranteed and are reference values only.
Additionally these values are specified as maximum values.
7.16.8 ADTRG timing
Parameter
Symbol
Condition
Ratings
Unit
Min Typ Max
ADCAnTRGm input High level width tWADH
with digital noise filter
without digital noise filter
a
-
- ns
b
-
- ns
ADCAnTRGm input Low level width tWADL
with digital noise filter
without digital noise filter
a
-
- ns
b
-
- ns
a) _{2, 3, 4 or 5 x Tsamp + 20 (Tsamp shows sampling period specified in noise filter).}
More than 1 PCLK width of ADC macro must be kept regarding DNF pass through pulse width.
b) _{1 × tSYNC+20 ( tSYNC: 1 PCLK of ADC macro)}
Notes 1. n: Number of macro instances. Refer to the User Manual for the detailed
specification.
2. m: Number of channels. Refer to the User Manual for the detailed
specification.
R01DS0140ED0100
65
Data Sheet