HD74HC597 Datasheet, PDF (6/10 Pages) Hitachi Semiconductor – 8-bit Latch/Shift Register

HD74HC597
• Waveform – 3 (SCLR to QH')
tf
tr
90 %
90 %
V_CC
Input SCLR
50 %
50 %
10 %
10 %
tw
0V
t_PHL
90 %
V_OH
Output QH'
50 %
10 %
V_OL
t_THL
t_rem
Input SCK
90 %
V_CC
50 %
10 %
0V
t_TLH
Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, t_r ≤ 6 ns, t_f ≤ 6 ns
• Waveform – 4 (SLoad to QH')
tf
tr
90 %
90 %
V_CC
Input SLoad
50 %
50 %
50 %
10 %
10 %
0V
t_w
t_PHL
t_PLH
90 %
90 %
V_OH
Output QH'
50 %
50 %
10 %
10 %
V_OL
t_THL
t_TLH
Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, t_r ≤ 6 ns, t_f ≤ 6 ns
Rev.2.00 Mar 30, 2006 page 6 of 9