HD151011 Datasheet, PDF (6/14 Pages) Hitachi Semiconductor – Dual BCD Programmable Counter with Synchronous Preset Enable

HD151011
Test Circuit
V_CC
Input
Pulse generator
Zout = 50 Ω
Input
Pulse generator
Zout = 50 Ω
V_CC
J0
J1
Q
J7
CO
C/T
CLK
CLK
SPE
PR
CLR
Output
Output
C_L
C_L
Note: 1. C_L includes probe and jig capacitance.
Waveforms – 1
CLK
CLK
tw
tw
6 ns
6 ns
10 %
90 % 90 %
Vre^*_f1
Vre^*_f1
10 %
t_PLH
t_PHL
90 %
Q
50 %
10 %
t_TLH
t_PLH
90 %
50 %
10 %
t_THL
t_PHL
90 %
CO
10 %
50 %
t_TLH
90 %
50 %
10 %
t_THL
Note:
1. In case of C/T = "L", CLK, CLK is V_IH = 3 V, Vref is 1.3 V
In case of C/T = "H", CLK, CLK is V_IH = V_CC, Vref is V_CC × 50%
*1
V_IH
GND
V_OH
V_OL
V_OH
V_OL
Rev.2.00, Jul.16.2004, page 6 of 13