32185 Datasheet, PDF (564/1032 Pages) Renesas Technology Corp – MCU

12
SERIAL INTERFACE
12.2 Serial Interface Related Registers
(3) STB (Stop Bit Length Select) bit (Bit 12)
This bit is effective during UART mode. Use this bit to select the stop bit length that indicates the end of
data to transmit. Setting this bit to "0" selects one stop bit, and setting this bit to "1" selects two stop bits.
During clock-synchronous mode, the content of this bit has no effect.
(4) PSEL (Odd/Even Parity Select) bit (Bit 13)
This bit is effective during UART mode. When parity is enabled (bit 14 = "1"), use this bit to select the parity
attribute (whether odd or even). Setting this bit to "0" selects an odd parity, and setting this bit to "1" selects an
even parity.
When parity is disabled (bit 14 = "0") and during clock-synchronous mode, the content of this bit has no effect.
(5) PEN (Parity Enable) bit (Bit 14)
This bit is effective during UART mode. When this bit is set to "1," a parity bit is added immediately
after the data bits of the transmit data, and the received data is checked for parity.
The parity bit added to the transmit data is automatically determined to be "0" or "1" so that the
attribute (odd/even) derived by adding the number of 1’s in data bits and the content of the parity bit
agrees with one that was selected with the odd/even parity select bit (bit 13).
Figure 12.2.7 shows an example of a data format when parity is enabled.
(6) SEN (Sleep Select) bit (Bit 15)
This bit is effective during UART mode. If the sleep function is enabled by setting this bit to "1," data is
latched into the UART Receive Buffer Register only when the most significant bit (MSB) of the re-
ceived data is "1."
32185/32186 Group Hardware Manual
Rev.1.10 REJ09B0235-0110 May 15, 07
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