H8S68 Datasheet, PDF (535/1044 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip MicrocomputerH8S Family/H8S/2300 Series

Section 10 16-Bit Timer Pulse Unit (TPU)
TCFV Flag/TCFU Flag Setting Timing: Figure 10.40 shows the timing for setting of the TCFV
flag in TSR by overflow occurrence, and the TCIV interrupt request signal timing.
Figure 10.41 shows the timing for setting of the TCFU flag in TSR by underflow occurrence, and
the TCIU interrupt request signal timing.
φ
TCNT input
clock
TCNT
(overflow)
Overflow
signal
TCFV flag
TCIV interrupt
H'FFFF
H'0000
Figure 10.40 TCIV Interrupt Setting Timing
φ
TCNT
input clock
TCNT
(underflow)
Underflow
signal
TCFU flag
H'0000
H'FFFF
TCIU interrupt
Figure 10.41 TCIU Interrupt Setting Timing
Rev.6.00 Mar. 18, 2009 Page 475 of 980
REJ09B0050-0600