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PD780701Y_15 Datasheet, PDF (53/66 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCONTROLLER
µPD780701Y, 780702Y
(e) UART mode (Dedicated baud rate generator output)
Parameter
Symbol
Conditions
Transfer rate
MIN.
TYP.
MAX. Unit
38836 bps
(f) UART mode (External clock input)
Parameter
Symbol
ASCK0 cycle time
tKCY3
ASCK0 high-/low-level
width
tKH3, tKL3
Transfer rate
Conditions
MIN.
800
400
TYP. MAX. Unit
ns
ns
39063 bps
(g) I2C bus mode
Parameter
Symbol
Standard Mode
High-speed Mode Unit
MIN.
MAX.
MIN.
MAX.
SCL0 clock frequency
Bus free time (between stop and start conditions)
Hold timeNote 1
SCL0 clock low-level width
SCL0 clock high-level width
Start/restart condition setup time
Data hold time CBUS compatible master
I2C bus
Data setup time
SDA0 and SCL0 signal rise time
SDA0 and SCL0 signal fall time
Stop condition setup time
Spike pulse width controlled by input filter
Capacitive load of each bus line
fSCL
tBUF
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR
tF
tSU:STO
tSP
Cb
0
4.7
4.0
4.7
4.0
4.7
5.0
0Note 2
250
−
−
4.0
−
−
100
−
−
−
−
−
−
−
−
1000
300
−
−
400
0
400
kHz
1.3
−
µs
0.6
−
µs
1.3
−
µs
0.6
−
µs
0.6
−
µs
−
−
µs
0Note 2
0.9Note 3
µs
100Note 4
−
ns
−
300
ns
−
300
ns
0.6
−
µs
0
50
ns
−
400
pF
Notes 1. On start condition, the first clock pulse is generated after this period.
2. To fulfill undefined area of the SCL0 falling edge, it is necessary for the device to provide internally SDA0
signal (on VIHmin. of SCL0 signal) with at least 300 ns of hold time.
3. If the device does not extend the SCL0 signal low hold time (tLOW), only maximum data hold time tHD:DAT
needs to be fulfilled.
4. The high-speed mode I2C bus is available in the standard mode I2C bus system. At this time, the
conditions described below must be satisfied.
• If the device does not extend the SCL0 signal low state hold time
tSU:DAT ≥ 250 ns
• If the device extends the SCL0 signal low state hold time
Be sure to transmit the next data bit to the SDA0 line before the SCL0 line is released (tRmax. + tSU:DAT =
1000 + 250 = 1250 ns by standard mode I2C bus specification).
Preliminary Product Information U13920EJ1V0PM00
51