PD780701Y_15 Datasheet, PDF (39/66 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCONTROLLER

µPD780701Y, 780702Y
Table 5-1. Interrupt Source List (2/2)
Interrupt Type
Default
Priority^{Note 1}
Name
Interrupt Source
Trigger
Internal/
External
Vector
Table
Address
Basic
Configuration
Type^{Note 2}
Maskable
20
INTTM010 Generation of matching signal of TM00 Internal
002CH
(B)
and CR010 (with compare register
specified)
TI010 valid edge detection (with capture
register specified)
21
INTTM001 Generation of matching signal of TM01
and CR001 (with compare register
specified)
002EH
TI001 valid edge detection (with capture
register specified)
22
INTTM011 Generation of matching signal of TM01
and CR011 (with compare register
specified)
0030H
TI011 valid edge detection (with capture
register specified)
23
INTTM50 Generation of matching signal of TM50
and CR50
0032H
24
INTTM51 Generation of matching signal of TM51
and CR51
0034H
25
INTTM52 Generation of matching signal of TM52
and CR52
0036H
26
INTAD
End of conversion by A/D converter
0038H
27
INTWTN0 Watch timer overflow
003AH
28
INTKR
Port 4 falling edge detection
External 003CH
(D)
Software
−
BRK
Execution of BRK instruction
−
003EH
(E)
Notes 1. Default priority is the priority order when several maskable interrupt requests are generated at the same
time. 0 is the highest order and 28 is the lowest order.
2. Basic configuration types (A) to (E) correspond to (A) to (E) in Figure 5-1.
Preliminary Product Information U13920EJ1V0PM00
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