H8S56 Datasheet, PDF (512/980 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2500 Series

Section 13 Serial Communication Interface (SCI)
Normal operation
Software
standby
Normal operation
Figure 13.32 Clock Halt and Restart Procedure
13.8 Interrupt Sources
13.8.1 Interrupts in Normal Serial Communication Interface Mode
Table 13.12 shows the interrupt sources in normal serial communication interface mode. A
different interrupt vector is assigned to each interrupt source, and individual interrupt sources can
be enabled or disabled using the enable bits in SCR.
When the TDRE flag in SSR is set to 1, a TXI interrupt request is generated. When the TEND flag
in SSR is set to 1, a TEI interrupt request is generated. A TXI interrupt can activate the DTC to
perform data transfer. The TDRE flag is cleared to 0 automatically when data is transferred by the
DTC*.
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated. When the ORER,
PER, or FER flag in SSR is set to 1, an ERI interrupt request is generated. An RXI interrupt
request can activate the DTC to transfer data. The RDRF flag is cleared to 0 automatically when
data is transferred by the DTC*.
A TEI interrupt is requested when the TEND flag is set to 1 and the TEIE bit is set to 1. If a TEI
interrupt and a TXI interrupt are requested simultaneously, the TXI interrupt has priority for
acceptance. However, if the TDRE and TEND flags are cleared simultaneously by the TXI
interrupt routine, the SCI cannot branch to the TEI interrupt routine later.
Note: * Flags are cleared only when the DISEL bit in DTC is 0 with the transfer couter other
than 0.
Rev. 6.00 Sep. 24, 2009 Page 464 of 928
REJ09B0099-0600