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2SK1318 Datasheet, PDF (5/7 Pages) Hitachi Semiconductor – Silicon N Channel MOS FET High Speed Power Switching
2SK1318
Reverse Drain Current vs.
Source to Drain Voltage
20
16
VGS = 10 V
12
15 V
Pulse Test
8
VGS = 0, –5 V
4
0
0.5
1
1.5
2
2.5
Source to Drain Voltage VSD (V)
Normalized Transient Thermal Impedance vs. Pulse Width
3
1.0 D = 1
0.5
0.3 0.2
0.1
0.1
0.05
0.02
0.03
0.01
1 Shot
Pulse
0.01
10 µ
100 µ
TC = 25°C
θch–c (t) = γS (t) • θch–c
θch–c = 3.57°C/W, TC = 25°C
PDM
PW
T
D
=
PW
T
1m
10 m
100 m
1
10
Pulse Width PW (S)
Switching Time Test Circuit
Vin Monitor
Vin
10 V
50 Ω
D.U.T
Vout Monitor
RL
VDD
= 30 V
Waveforms
90%
Vin 10%
Vout 10%
td (on)
90%
tr
90%
td (off)
10%
tf
Rev.2.00 Sep 07, 2005 page 5 of 6