R8C20 Datasheet, PDF (46/501 Pages) Renesas Technology Corp – RENESAS MCU R8C FAMILY / R8C/2x SERIES

R8C/20 Group, R8C/21 Group
6. Voltage Detection Circuit
Voltage monitor 2 interrupt/reset generation circuit
Voltage detection 2 circuit
VCA27
fOCO-S
VCC +
Internal
reference ^-
voltage
VCA13
Noise filter
(Filter width: 200ns)
Voltage
detection
2 signal
Voltage detection 2 signal
is held “H” when VCA27 bit
is set to 0 (disabled)
VW2F1 to VW2F0
= 00b
= 01b
= 10b
1/2 1/2 1/2 ^{= 11b}
VW2C2 bit is set to 0 (not detected) by
writing 0 by program.
When VCA27 bit is set to 0 (voltage
detection 2 circuit disabled), VW2C2
bit is set to 0
VW2C1
Digital
filter
VW2C2
VW2C1
Watchdog timer block
Watchdog timer underflow
signal
VW2C3 _VW2C7
This bit is set to 0 (not detected) by writing
“0” by program.
VW2C0 to VW2C3, VW2F2, VW2F1, VW2C6, VW2C7: Bits in VW2C register
VCA13: Bit in VCA1 register
VCA27: Bit in VCA2 register
VW2C0
VW2C6
Watchdog timer
interrupt signal
Voltage monitor 2
interrupt signal _Non-maskable
interrupt signal
Oscillation stop
detection
interrupt signal
Voltage
monitor 2
reset signal
Figure 6.3 Block Diagram of Voltage Monitor 2 Interrupt/Reset Generation Circuit
Rev.2.00 Aug 27, 2008 Page 30 of 458
REJ09B0250-0200