R8C20 Datasheet, PDF (274/501 Pages) Renesas Technology Corp – RENESAS MCU R8C FAMILY / R8C/2x SERIES

R8C/20 Group, R8C/21 Group
14. Timers
14.4.1 Output Compare Mode
The output compare mode is to count the internal count source divided-by-2 using the 4-bit or 8-bit counter and
detect the compare value match with the 8-bit counter.
Figure 14.114 shows the Block Diagram of Output Compare Mode and Table 14.37 lists the Output Compare
Mode Specifications. Figures 14.115 to 14.119 show the Registers Associated with Output Compare Mode and
Figure 14.120 shows the Operation in Output Compare Mode.
f4
f8
RCS1 to RCS0
= 00b
= 01b
f32
= 10b
1/2
4-bit
counter
RCS2 = 1
RCS2 = 0
8-bit
counter
Match
Comparison ^signal
circuit
TQ
R
RCS6 to RCS5
= 00b
f2
= 01b
= 10b
= 11b
Reset
TRERST bit
COMIE
TOENA
TREO pin
Timer RE interrupt
TOENA, TRERST: Bits in TRECR1 register
COMIE: Bit in TRECR2 register
RCS0 to RCS2, RCS5 to RCS6: Bits in TRECSR register
TRESEC
TREMIN
Data bus
Figure 14.114 Block Diagram of Output Compare Mode
Rev.2.00 Aug 27, 2008 Page 258 of 458
REJ09B0250-0200