MC-10118B_15 Datasheet, PDF (46/66 Pages) Renesas Technology Corp – MULTIMEDIA PROCESSOR FOR MOBILE APPLICATIONS

MC-10118B
2.5.5 IIC interface
(IO buffer drive capability: 2 mA)
Parameter
Symbol
Conditions
Standard Mode^{Note 1} High-Speed Mode^{Note 1} Unit
MIN.
MAX.
MIN.
MAX.
IIC_SCL clock frequency
fC
ʵ
0
70
0
341
kHz
IIC bus free time
tBF
Interval between stop and start
4.7

1.3

s
conditions
IIC hold time^{Note 2}
tH1
ʵ
4.0

0.6

s
IIC hold time (SCL clock)
tWL
“Low” state
4.7

1.3

s
tWH
“Hi” state
4.0

0.6

s
IIC setup time
tSU1
Start condition
Restart condition
4.7

0.6

s
IIC data setup time
tSU2
ʵ
250

100^{Note 3}

ns
IIC rise time
tR
SDA and SCL signals



300^{Note 4}
ns
IIC fall time
tF
SDA and SCL signals



300^{Note 4}
ns
IIC setup time
tSU3
Stop condition
4.0

0.6

s
IIC data hold time
tH2
Clock fall output
5.0

ʵ

s
Clock fall input
0
3.45
0^{Note 5}
0.9^{Note 6}
s
Capacitance load of each
Cb
ʵ

400

400
pF
IIC bus line
Notes 1. Select the standard mode or high-speed mode by using the SMC0 bit of the IIC0 clock select register
(IICCL0).
2. At the start condition, the first clock pulse is generated after the hold time.
3. The high-speed mode I²C bus can be used in the standard-mode I²C bus system. In this case, set the
high-speed mode I²C bus so that it meets the following conditions.
 If the system does not extend the IIC_SCL signal’s low state hold time: tSU2  250 ns
4. Do not input noise exceeding the hysteresis width of the 1.8 V system IO Schmitt buffer during a rise or
fall time.
5. The system requires a minimum of 300 ns hold time internally for the SDA signal (at VIH (MIN.) [0.7 VDD2]
of IIC_SCL signal) in order to occupy the undefined area at the falling edge of IIC_SCL.
6. If the system does not extend the IIC_SCL signal low hold time (tWL), only the maximum data hold time
(tH2) needs to be satisfied.
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Data Sheet R19DS0008EJ0700