MC-10118B_15 Datasheet, PDF (27/66 Pages) Renesas Technology Corp – MULTIMEDIA PROCESSOR FOR MOBILE APPLICATIONS

MC-10118B
(18) JTAG signals (VIO18 / VIO3)
Pin Name
Pin No.
I/O
Function
DEBUG_EN ^Note
H16
Input JTAG
JT0_TCK
E16
Input JTAG
JT0_TRSTB
D17
Input JTAG
JT0_TMS
B16
Input JTAG
JT0_TDI
C16
Input JTAG
JT0_TDO
D16
Output JTAG
JT0_RTCK
C17
Output JTAG
Note VIO18
(19) Test signals (VIO18)
Pin Name
Pin No.
I/O
Function
UTEST
TESTRSTB
TRSTB
TE1
TE2
H17
Input Test pin (usually fixed to 0)
E17
Input Asynchronous reset for testing
E18
Input Test pin
H12
Input Test pin
E11
Input Test pin
Alternate Pin
Function







Type
J
C
C
D
D
D
D
Handling When
Not Used
Leave open.
Leave open.
Leave open.
Leave open.
Leave open.
Leave open.
Leave open.
Alternate Pin
Function





Type
E
N
M
Q
R
Handling When
Not Used
“L” level hold.
Leave open.
Leave open.
Leave open.
Leave open.
(20) Power supply
Pin Name
Pin No.
I/O
Function
V
A7, A13, A20, B7, B13, B20, E1,
E2, F23, F24, L21, L22, U1, U2, U3,
U4, U5, U21, U22, Y11, AA11, AC5,
AC18, AD5, AD18
VIO18
A21, B21, E3, E4, L23, L24, U23, U24,
AA18, AB7, AB11, AB18, AC7, AC11,
AD7, AD11
VIO3
A14, B14, C7, C14, D7, D14, M1, M2,
M3, M4, Y1, Y2, Y3, Y4
VA1
C11, D11
VA2
A10, B10
VA3
A12, B12
VDDQ_DDR G1, G2, P3, P4, P5, W1, W2
VDD_DDR G3, G4, H21, H22, H23, H24, N21,
N22, N23, N24, P1, P2, W3, W4,
W21 ,W22, W23, W24
 Core power supply (1.2 V)

IO power supply (1.8 V system)

IO power supply (3 V system)

PLL power supply (1.2V)

PLL power supply (1.2V)

PLL power supply (1.2V)

DDR power supply (1.8V)

DDR power supply (1.8V)
Type Handling When
Not Used
















Data Sheet R19DS0008EJ0700
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