H8S2215 Datasheet, PDF (458/878 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

Section 13 Serial Communication Interface
Bit Bit Name Initial Value R/W Description
1 MPB
0
R
Multiprocessor Bit
This bit is not used in Smart Card interface mode.
0 MPBT 0
R/W Multiprocessor Bit Transfer
Write 0 to this bit in Smart Card interface mode.
Notes: 1. The write value should always be 0 to clear the flag.
2. The clearing conditions using the DTC are that DISEL bit be cleared to 0 and the
transfer counter value be other than 0.
13.3.8 Smart Card Mode Register (SCMR)
SCMR selects the operation in smart card interface or the data Transfer formats.
Bit Bit Name Initial Value
7 to 4 —
All 1
3
DIR
0
2
INV
0
1
—
1
0
SMIF
0
R/W
—
R/W
R/W
—
R/W
Description
Reserved
These bits are always read as 1.
Smart Card Data Transfer Direction
Selects the serial/parallel conversion format.
0: LSB-first in transfer
1: MSB-first in transfer
The bit setting is valid only when the transfer data format
is 8 bits.
Smart Card Data Invert
Specifies inversion of the data logic level. The SINV bit
does not affect the logic level of the parity bit. To invert
the parity bit, invert the O/E bit in SMR.
0: TDR contents are transmitted as they are. Receive
data is stored as it is in RDR
1: TDR contents are inverted before being transmitted.
Receive data is stored in inverted form in RDR
Reserved
This bit is always read as 1.
Smart Card Interface Mode Select
When this bit is set to 1, smart card interface mode is
selected.
0: Normal asynchronous or clocked synchronous mode
1: Smart card interface mode
Rev.7.00 Mar. 27, 2007 Page 400 of 816
REJ09B0140-0700