H8S2215 Datasheet, PDF (212/878 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

Section 7 DMA Controller (DMAC)
Bit Bit Name Initial Value R/W Description
5 RPE
0
R/W Repeat Enable
Used in combination with the DTIE bit in DMABCR to select
the mode (sequential, idle, or repeat) in which transfer is to
be performed.
RPE DTIE
0 0: Transfer in sequential mode (no transfer end
interrupt)
0 1: Transfer in sequential mode (with transfer end
interrupt)
1 0: Transfer in repeat mode (no transfer end
interrupt)
1 1: Transfer in idle mode (with transfer end
interrupt)
Note: For details of operation in sequential, idle, and repeat
mode, see section 7.4.2, Sequential Mode, section 7.4.3, Idle
Mode, and section 7.4.4, Repeat Mode.
4 DTDIR 0
R/W Data Transfer Direction
Specifies the data transfer direction (source or destination).
0: Transfer with MAR as source address and IOAR as
destination address
1: Transfer with IOAR as source address and MAR as
destination address
Rev.7.00 Mar. 27, 2007 Page 154 of 816
REJ09B0140-0700