H8S2144B Datasheet, PDF (425/546 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

Initial
Bit Bit Name Value
5 NESEL 0
4 EXCLE 0
3
0
2 to 0 
All 0
Section 18 Power-Down Modes
R/W Description
R/W Noise Elimination Sampling Frequency Select
Selects the frequency by which the subclock (φSUB) input
from the EXCL pin is sampled using the clock (φ)
generated by the system clock pulse generator. Clear this
bit to 0 when φ is 5 MHz or more.
0: Sampling using φ/32 clock
1: Sampling using φ/4 clock
R/W Subclock Input Enable
Enables/disables subclock input from the EXCL pin.
0: Disables subclock input from the EXCL pin
1: Enables subclock input from the EXCL pin
R/W Reserved
An undefined value is read from this bit. This bit should not
be set to 1.
R
Reserved
These bits are always read as 0 and cannot be modified.
18.1.3 Module Stop Control Registers H and L (MSTPCRH, MSTPCRL)
MSTPCRH and MSTPCRL specify on-chip peripheral modules to shift to module stop mode in
module units. Each module can enter module stop mode by setting the corresponding bit to 1.
• MSTPCRH
Initial
Bit Bit Name Value
R/W
7 MSTP15 0*
R/W
6 MSTP14 0
R/W
5 MSTP13 1
R/W
4 MSTP12 1
R/W
3 MSTP11 1
R/W
2 MSTP10 1
R/W
1 MSTP9 1
R/W
0 MSTP8 1
R/W
Note: * Do not set this bit to 1.
Corresponding Module


16-bit free-running timer (FRT)
8-bit timers (TMR_0, TMR_1)
14-bit PWM timer (PWMX)
D/A converter
A/D converter
8-bit timer (TMR_Y)
Rev. 1.00 Jun.24, 2005 Page 393 of 510
REJ09B0241-0100