H8S2144B Datasheet, PDF (259/546 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

Section 10 8-Bit Timer (TMR)
Section 10 8-Bit Timer (TMR)
This LSI has three channels of on-chip 8-bit timer modules (TMR_0, TMR_1, and TMR_Y) made
up of 8-bit counters. The 8-bit timer module can count external events, and can also be used as a
multifunction timer in a variety of applications, such as generation of counter reset, interrupt
requests, and pulse output with an arbitrary duty cycle using a compare-match signal with two
registers.
10.1 Features
• Selection of clock sources
 TMR_0, TMR_1: The counter input clock can be selected from six internal clocks and an
external clock
 TMR_Y: The counter input clock can be selected from three internal clocks and an external
clock
• Selection of three ways to clear the counters
 The counters can be cleared on compare-match A or compare-match B, or by an external
reset signal.
• Timer output controlled by two compare-match signals
 The timer output signal in each channel is controlled by two independent compare-match
signals, enabling the timer to be used for various applications, such as the generation of
pulse output or PWM output with an arbitrary duty cycle. (The TMR_Y does not have a
timer output pin.)
• Cascading of TMR_0 and TMR_1
 Operation as a 16-bit timer can be performed using TMR_0 as the upper half and TMR_1
as the lower half (16-bit count mode).
 TMR_1 can be used to count TMR_0 compare-match occurrences (compare-match count
mode).
• Multiple interrupt sources for each channel
TMR_0, TMR_1, and TMR_Y: Three types of interrupts: Compare-match A, compare-match
B, and overflow
TIMH261A_010020020700
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REJ09B0241-0100