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M32C88 Datasheet, PDF (40/461 Pages) Renesas Technology Corp – RENESAS 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
M32C/88 Group (M32C/88T)
2. Central Processing Unit (CPU)
2. Central Processing Unit (CPU)
Figure 2.1 shows the CPU registers.
The register bank is comprised of 8 registers (R0, R1, R2, R3, A0, A1, SB and FB) out of 28 CPU registers.
Two sets of register banks are provided.
b31
General Registers
R2
R3
b23
b15
R0H
b0
R0L
R1H
R1L
R2
R3
A0
A1
SB
FB
Data Register(1)
Address Register(1)
Static Base Register(1)
Frame Base Register(1)
USP
ISP
INTB
PC
User Stack Pointer
Interrupt Stack Pointer
Interrupt Table Register
Program Counter
FLG
Flag Register
b15
IPL
b8 b7
b0
U I OB SZ DC
Carry Flag
Debug Flag
Zero Flag
Sign Flag
Register Bank Select Flag
Overflow Flag
Interrupt Enable Flag
Stack Pointer Select Flag
Reserved Space
Processor Interrupt Priority Level
Reserved Space
High-speed Interrupt Registers b23
b15
SVF
SVP
VCT
b0
Flag Save Register
PC Save Register
Vector Register
DMAC-associated Registers
b23
b7
b0
DMD0
b15
DMD1
DCT0
DCT1
DRC0
DRC1
DMA0
DMA1
DRA0
DRA1
DSA0
DSA1
DMA Mode Register
DMA Transfer Count Register
DMA Transfer Count Reload Register
DMA Memory Address Register
DMA Memory Address Reload Register
DMA SFR Address Register
NOTE:
1. The register bank is comprised of these registers. Two sets of register banks are provided.
Figure 2.1 CPU Register
Rev. 1.10 Oct. 18, 2005 Page 17 of 435
REJ09B0162-0110