RJK0323JPD Datasheet, PDF (4/7 Pages) Renesas Technology Corp – Silicon N Channel MOS FET High Speed Power Switching

RJK0323JPD
Static Drain to Source On State Resistance
vs. Temperature
20
Pulse Test
I_D = 15 A
15
V_GS = 10 V
10
4.5 V
5
0
−50
0
50
100
150
Case Temperature Tc (°C)
Dynamic Input Characteristics
50
Tc = 25°C
I_D = 30 A
40
30
V_DS
V_DD = 25 V
10 V
5V
20
16
V_GS
12
20
8
10
V_DD = 25 V
4
10 V
5V
0
0
10 20 30 40 50
Gate Charge Qg (nC)
Avalanche Energy vs.
Channel Temperature Derating
100
I_AP = 30 A
V_DD = 25 V
80
duty < 0.1 %
Rg ≥ 50 Ω
60
40
20
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
10000
1000
Preliminary
Typical Capacitance vs.
Drain to Source Voltage
Ciss
Coss
100
Crss
Tc = 25°C
V_GS = 0
f = 1 MHz
10
0 5 10 15 20 25 30
Drain to Source Voltage V_DS (V)
Reverse Drain Current vs.
Source to Drain Voltage
50
40
10 V
Tc = 25°C
Pulse Test
30
20
V_GS = 0, −5 V
10
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
R07DS0334EJ0100 Rev.1.00
Apr 18, 2011
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