HAT1110R Datasheet, PDF (4/8 Pages) Renesas Technology Corp – Silicon P Channel Power MOS FET Power Switching

HAT1110R
Static Drain to Source on State Resistance
vs. Temperature
3.0
Pulse Test
2.5
–1 A
2.0
I_D = –0.2 A, –0.5 A
1.5
V_GS = –4.5 V
1.0
–1 A
0.5 _{–10 V}
–0.2 A, –0.5 A
0
–25 0 25 50 75 100 125 150
Case Temperature Tc (°C)
Body-Drain Diode Reverse
Recovery Time
100
50
20
10
5
2
di / dt = –100 A / µs
1
V_GS = 0, Ta = 25°C
–0.1 –0.3
–1
–3
–10
Reverse Drain Current I_DR (A)
Dynamic Input Characteristics
0
0
V_DD = –50 V
–25 V
–20
–10 V
I_D = –1 A _–4
–40
–60 ^VDS
V_GS
–80
–100
0
V_DD = –50 V
–25 V
–10 V
2
4
6
8
Gate Charge Qg (nC)
–8
–12
–16
–20
10
Forward Transfer Admittance vs.
Drain Current
10
5
2
Tc = –25°C
1
0.5
0.2
0.1
0.05
25°C
75°C
0.02
0.01
–0.01 –0.03 –0.1 –0.3
Drain Current
V_DS = –10 V
Pulse Test
–1 –3 –10
I_D (A)
Typical Capacitance vs.
Drain to Source Voltage
1000
500
V_GS = 0
f = 1 MHz
200
Ciss
100
50
20
Coss
10
Crss
5
2
1
0 –10 –20 –30 –40 –50
Drain to Source Voltage V_DS (V)
Switching Characteristics
100
50
td(off)
20 _td(on)
10 ^tr
5
tf
2
1
–0.1
V_GS = –10 V, V_DS = –30 V
Rg = 4.7 Ω, duty ≤ 1 %
–1
–10
Drain Current I_D (A)
Rev.2.00, Oct.07.2007, page 4 of 7