H8SX1520R Datasheet, PDF (333/826 Pages) Renesas Technology Corp – 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series

Section 9 16-Bit Timer Pulse Unit (TPU)
Initial
Bit
Bit Name value R/W Description
0
TGFA
0
R/(W)* Input Capture/Output Compare Flag A
Status flag that indicates the occurrence of TGRA input
capture or compare match.
[Setting conditions]
• When TCNT = TGRA while TGRA is functioning as
output compare register
• When TCNT value is transferred to TGRA by input
capture signal while TGRA is functioning as input
capture register
[Clearing conditions]
• When DMAC is activated by a TGIA interrupt while
the DTA bit in DMDR of DMAC is 1
• When 0 is written to TGFA after reading TGFA = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
Note: * Only 0 can be written to clear the flag.
Rev. 1.00 Mar. 06, 2006 Page 295 of 784
REJ09B0282-0100