H8S-2172 Datasheet, PDF (329/570 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2100 Series

11.3.7 Serial Status Register (SSR)
SSR is a register containing status flags of the SCI. Flags TDRE, RDRF, ORER, PER, and FER
can only be cleared.
Initial
Bit Bit Name Value
7
TDRE
1
6
RDRF
0
R/W Description
R/(W)* Transmit Data Register Empty
Indicates whether TDR contains transmit data.
[Setting conditions]
• When the TE bit in SCR is 0
• When data is transferred from TDR to TSR, and
data writing to TDR is enabled.
[Clearing condition]
• When 0 is written to TDRE after reading TDRE = 1
R/(W)* Receive Data Register Full
Indicates that the received data is stored in RDR.
[Setting condition]
• When serial reception ends normally and receive
data is transferred from RSR to RDR
[Clearing condition]
• When 0 is written to RDRF after reading RDRF = 1
The RDRF flag is not affected and retains its previous
value when the RE bit in SCR is cleared to 0. Exercise
care because if reception of the next data is completed
while the RDRF flag is set to 1, an overrun error occurs
and receive data will be lost.
Rev. 2.00, 03/04, page 297 of 534