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7702 Datasheet, PDF (298/522 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER
RESET
13.2 Software reset
13.2 Software reset
When the power source voltage satisfies the microcomputer’s recommended operating conditions, the
microcomputer is reset by writing “1” to the software reset bit (bit 3 at address 5E16). This is called a
software reset. In this case, the microcomputer initializes pins, CPU, and SFR area just as in the case of
a hardware reset. However, the microcomputer retains the contents of the internal RAM area. (Refer to
Table 13.1.1 and Figures 13.1.2 to 13.1.6.) Figure 13.2.1 shows the structure of processor mode register.
After completing initialization, the microcomputer performs the internal processing sequence after a reset.
(Refer to Figure 13.1.7.) After that, it executes a program beginning from the address set into the reset
vector addresses which are FFFE16 and FFFF16.
b7 b6 b5 b4 b3 b2 b1 b0
0
Processor mode register (Address 5E16)
Bit
Bit name
0 Processor mode bits
1
2 Wait bit
Functions
b1 b0
0 0 : Single-chip mode
0 1 : Memory expansion mode
1 0 : Microprocessor mode
1 1 : Not selected
0 : Software Wait is inserted when
accessing external area.
1 : No software Wait is inserted
when accessing external area.
At reset RW
0 RW
0
RW
(Note 1)
0
RW
3 Software reset bit
The microcomputer is reset by
writing “1” to this bit. The value is
“0” at reading.
4
Interrupt priority detection time b5 b4 i
select bits
0 0 : 7 cycles of
0 1 : 4 cycles of
5
1 0 : 2 cycles of
1 1 : Not selected
6 Fix this bit to “0.”
0 WO
0
RW
0
RW
0 RW
7 Clock 1 output select bit
0 : Clock 1 output disabled
0 RW
(Note 2)
(P42 functions as a programmable
I/O port.)
1 : Clock 1 output enabled
(P42 functions as a clock 1 out-
put pin.)
Notes 1: While supplying the Vcc level to the CNVss pin, this bit becomes “1”
after a reset. (Fixed to “1.”)
2: This bit is ignored in the microprocessor mode. (It may be either “0” or “1.”)
: Bits 0 to 2 and 4 to 7 are not used at software reset.
Fig. 13.2.1 Structure of processor mode register
13–12
7702/7703 Group User’s Manual