7702 Datasheet, PDF (284/522 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER

CONNECTION WITH EXTERNAL DEVICES
12.4 Hold function
<When inputting “L” level to HOLD pin during term unusing bus>
q State when inputting “L” level to HOLD pin
External data bus Data length
External data bus width
8
Unused
16
8, 16
8, 16
Judgment timing of input
level to HOLD pin
Clock
V
1
ALE
E
R/W
External address bus /
External data bus
External address bus
BHE
HOLD
HLDA
Œ
Address A
Floating
Floating
Floating
Address B
1! 1
1!1
Hold state
Term unusing bus
Term using bus
ΠThis is the term in which the bus is not used, so that not a new
address but an address output just before is output again.
V Clock 1 has the same polarity and the same frequency as .
Signals timing to be input or output externally is ordained by clock 1 as a basis.
Fig. 12.4.2 Timing of acceptance of Hold request and termination of Hold state (1)
12–18
7702/7703 Group User’s Manual