R8C32A Datasheet, PDF (288/603 Pages) Renesas Technology Corp – MCU M16C FAMILY / R8C/Tiny SERIES

Under development ^{Preliminary specification}
Specifications in this manual are tentative and subject to change.
R8C/32A Group
19. Timer RC
19.7.1 Timer RC Control Register 1 (TRCCR1) in PWM2 Mode
Address 0121h
Bit b7
Symbol CCLR
After Reset 0
b6
TCK2
0
b5
TCK1
0
b4
TCK0
0
b3
TOD
0
b2
TOC
0
b1
TOB
0
b0
TOA
0
Bit Symbol
Bit Name
Function
R/W
b0
TOA _{TRCIOA output level select bit} ⁽¹⁾
Disabled in PWM2 mode
R/W
b1
TOB _{TRCIOB output level select bit} ^{(1, 2)} 0: Active level “H”
R/W
(Initial output “L”
“H” output by compare match in the TRCGRC
register
“L” output by compare match in the TRCGRB
register
1: Active level “L”
(Initial output “H”
“L” output by compare match in the TRCGRC
register
“H” output by compare match in the TRCGRB
register
b2
TOC _{TRCIOC output level select bit} ⁽¹⁾
Disabled in PWM2 mode
R/W
b3
TOD _{TRCIOD output level select bit} ⁽¹⁾
R/W
b4 TCK0 _{Count source select bit} ⁽¹⁾
b5 TCK1
b6 TCK2
b6 b5 b4
0 0 0: f1
0 0 1: f2
0 1 0: f4
R/W
R/W
R/W
0 1 1: f8
1 0 0: f32
1 0 1: TRCCLK input rising edge
1 1 0: fOCO40M
1 1 1: fOCO-F ⁽³⁾
b7 CCLR TRC counter clear select bit
0: Disable clear (free-running operation)
R/W
1: Clear by compare match in the TRCGRA
register
Notes:
1. Set to these bits when the TSTART bit in the TRCMR register is set to 0 (count stops).
2. If the pin function is set for waveform output (refer to 7.5 Port Settings), the initial output level is output when the
TRCCR1 register is set.
3. To select fOCO-F, set it to the clock frequency higher than the CPU clock frequency.
REJ09B0458-0010 Rev.0.10 Apr 01, 2008
Page 260 of 572