M306V8FJFP Datasheet, PDF (271/365 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M306V8FJFP
Table 17.1. Unassigned Pin Handling in Single-chip Mode
Pin name
Connection
Ports P0 to P10
After setting for input mode, connect every pin to VSS via a resistor(pull-down);
or after setting for output mode, leave these pins open. (Note 1)
XOUT (Note 2)
Open
BYTE
Connect to VSS
Note 1: When the ports P70 and P71 are set for output mode, make sure a low-level signal is output from the pins.
The ports P70 and P71 are N-channel open-drain outputs.
Note 2: With external clock input to XIN pin.
Table 17.2. Unassigned Pin Handling in Memory Expansion Mode and Microprocessor Mode
Pin name
Connection
Ports P6 to P10
After setting for input mode, connect every pin to VSS via a resistor (pull-down);
or after setting for output mode, leave these pins open. (Note 1, 2)
P45 / CS1 to P47 / CS3
Connect to VCC via a resistor (pulled high) by setting the PD4 register’s
corresponding direction bit for CSi (i=1 to 3) to “0” (input mode) and the CSR
register’s CSi bit to “0” (chip select disabled).
BHE, ALE, HLDA, XOUT(Note 3), ^Open
BCLK (Note 4)
HOLD, RDY
Connect via resistor to VCC2 (pull-up)
Note 1: If the CNVSS1 pin has the VSS level applied to it, these pins are set for input ports until the processor mode
is switched over in a program after reset. For this reason, the voltage levels on these pins become
indeterminate, causing the power supply current to increase while they remain set for input ports.
Note 2: When the ports P70 and P71 are set for output mode, make sure a low-level signal is output from the pins.
The ports P70 and P71 are N-channel open-drain outputs.
Note 3: With external clock input to XIN pin.
Note 4: If the PM07 bit in the PM0 register is set to “1” (BCLK output is not carried out), connect this pin to VCC via a
resistor (pulled high).
Microcomputer
Port P0 to P10
(Input mode)
···
(Input mode)
(Output mode)
···
Open
XOUT
Open
BYTE
Microcomputer
Port P6 to P10
(Input mode)
···
(Input mode)
(Output mode)
Port P45 / CS1
to P47 / CS3
BHE
HLDA
ALE
XOUT
BCLK (Note)
HOLD
RDY
···
Open
Open
VCC
In single-chip mode
VSS
VSS
In memory expansion mode or
in microprocessor mode
Note: When PM07 bit of PM0 register is set to “1” (BCLK output is not carried out) please connect with VCC
through register (pull-up).
Figure 17.11. Unassigned Pins Handling
Rev.1.31 Apr 18, 2005 page 271 of 363
REJ03B0082-0131