M306V8FJFP Datasheet, PDF (209/365 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M306V8FJFP
Block control register i
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
BCi (i = 1 to 16)
Address
021016 to 021F16
When reset
Indeterminate
Bit symbol
Bit name
Function
RW
BCi_0 Display mode ^{b2 b1 b0}
Functions
RW
selection bits
0 0 0 Display OFF
0 0 1 OSDS mode (No bordered)
0 1 0 CC mode
BCi_1
0 1 1 CDOSD mode
RW
1 0 0 OSDP mode (No bordered)
1 0 1 OSDS mode (Bordered)
BCi_2
1 1 0 OSDP mode (Bordered)
1 1 1 OSDL mode
RW
BCi_3
BCi_4
BCi_5
BCi_6
Dot size
selection bits
Pre-divide ratio
selection bits
b6 b5 b4 b3 Pre-divide
ratio
Dot size
00
1Tc ✕ 1/2H
01
1Tc ✕ 1H
0 0 1 0 ✕ 1 _{2Tc ✕ 2H}
11
3Tc ✕ 3H
00
1Tc ✕ 1/2H
01
1Tc ✕ 1H
0 1 _{1 0 ✕ 2 2Tc ✕ 2H}
11
3Tc ✕ 3H
11 ⁰⁰
01
1.5Tc ✕ 1/2H (See notes 3, 4)
1.5Tc ✕ 1H (See notes 3, 4)
00
1Tc ✕ 1/2H
11 01
1Tc ✕ 1H
10
11
✕3
2Tc ✕ 2H
3Tc ✕ 3H
RW
RW
RW
RW
Nothing is assigned. In an attempt to write to this bit, write “0.”
The value, if read, turns out to be indeterminate.
Notes 1: Tc is OSD clock cycle divided in pre-divide circuit
2: H is HSYNC
3: This character size is available only in Layer 2. At this time, set layer 1’s
pre-divide ratio = ✕ 2, layer 1’s horizontal dot size = 1Tc.
4: In OSDL and OSDP modes, 1.5Tc size cannot be used.
Figure 16.4 Block control register i (i = 1 to 16)
Rev.1.31 Apr 18, 2005 page 209 of 363
REJ03B0082-0131