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NP90N03VHG_15 Datasheet, PDF (2/8 Pages) Renesas Technology Corp – MOS FIELD EFFECT TRANSISTOR
NP90N03VHG
Chapter Title
Electrical Characteristics (TA = 25°C)
Item
Symbol Min
Zero Gate Voltage Drain Current IDSS
Gate Leakage Current
IGSS
Gate to Source Threshold Voltage VGS(th)
2.0
Forward Transfer Admittance ∗1
| yfs |
25
Drain to Source On-state
Resistance ∗1
RDS(on)
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage ∗1
Reverse Recovery Time
Reverse Recovery Charge
Note: ∗1. Pulsed
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
QG
QGS
QGD
VF(S-D)
trr
Qrr
Typ
3.0
55
2.5
5000
600
420
32
20
64
13
90
24
31
0.9
43
46
Max
1
±10
4.0
3.2
7500
900
760
64
49
128
30
135
1.5
Unit
μA
μA
V
S
mΩ
Test Conditions
VDS = 30 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
VDS = VGS, ID = 250 μ A
VDS = 5 V, ID = 45 A
VGS = 10 V, ID = 45 A
pF
VDS = 25 V,
pF
VGS = 0 V,
pF f = 1 MHz
ns
VDD = 15 V, ID = 45 A,
ns
VGS = 10 V,
ns
RG = 0 Ω
ns
nC
VDD = 24 V,
nC
VGS = 10 V,
nC
ID = 90 A
V
IF = 90 A, VGS = 0 V
ns
IF = 90 A, VGS = 0 V,
nC di/dt = 100 A/μ s
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
L
PG.
50 Ω
VDD
VGS = 20 → 0 V
IAS
ID
VDD
BVDSS
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
PG.
RG
VGS
0
τ
τ = 1 μs
Duty Cycle ≤ 1%
RL
VDD
VGS
VGS
Wave Form
10%
0
VDS
90%
VDS
VDS
0
Wave Form
td(on)
VGS
90%
90%
10% 10%
tr td(off)
tf
ton
toff
D.U.T.
IG = 2 mA
RL
PG.
50 Ω
VDD
R07DS0128EJ0100 Rev.1.00
Sep 24, 2010
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