NP16N06QLK Datasheet, PDF (2/9 Pages) Renesas Technology Corp – Dual N-channel Power MOS FET

NP16N06QLK
Absolute Maximum Ratings (T_A = 25°C)
Item
Drain to Source Voltage (V_GS = 0 V)
Gate to Source Voltage (V_DS = 0 V)
Drain Current (DC) (T_C = 25°C) ^∗4
Drain Current (pulse) ^{∗1, 4}
Total Power Dissipation (T_C = 25°C) ^∗4
Total Power Dissipation (T_A = 25°C) ^{∗2, 4}
Channel Temperature
Storage Temperature
Repetitive Avalanche Current ^∗3
Repetitive Avalanche Energy ^∗3
Symbol
V_DSS
V_GSS
I_D(DC)
I_D(pulse)
P_T1
P_T2
T_ch
T_stg
I_AR
E_AR
Ratings
60
±20
±16
±32
25
1.0
175
−55 to +175
7
5
Thermal Resistance
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance ^∗2
R_th(ch-C)
R_th(ch-A)
5.95
150
°C/W
°C/W
Notes: *1. T_C = 25°C, PW ≤ 10 μs, Duty Cycle ≤ 1%
*2. Mounted on glass epoxy substrate of 40 mm × 40 mm × 1.6 mmt with 4% copper area (35 μm)
*3. R_G = 25 Ω, V_GS = 20 V → 0 V
*4. One channel operation
Unit
V
V
A
A
W
W
°C
°C
A
mJ
R07DS1290EJ0101 Rev.1.01
Oct 27, 2015
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