HD49340NP Datasheet, PDF (2/22 Pages) Renesas Technology Corp – CDS/PGA & 10-bit A/D Converter

HD49340NP/HNP
Pin Arrangement
VRM
VRT
VRB
DV_DD
DV_SS
CS
SDATA
SCK
D0
27 26 25 24 23 22 21 20 19
28
18
29
17
30
16
31
15
32
14
33
13
34
12
35
11
36
10
123456789
AV_SS
SPSIG
SPBLK
OBP
PBLK
DV_DD
ADCLK
DV_SS
DRDV_DD
(Top view)
Pin Description
Pin No.
1 to 9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Symbol
D0 to D9
DRDVDD
DVSS
ADCLK
DVDD
PBLK
OBP
SPBLK
SPSIG
AVSS
AVDD
BLKSH
BLKFB
CDSIN
BLKC
BIAS
25
AVDD
26
AVSS
27
ADCIN
28
VRM
29
VRT
30
VRB
Description
Digital output
Output buffer power supply (3 V)
Digital ground (0 V)
ADC conversion clock input pin
Digital power supply (3 V)
Preblanking input pin
Optical black pulse input pin
Black level sampling clock input pin
Signal level sampling clock input pin
Analog ground (0 V)
Analog power supply (3 V)
Black level S/H pin
Black level FB pin
CDS input pin
Black level C pin
Internal bias pin
Connect a 33 kΩ resistor between BIAS and AVSS.
Analog power supply (3 V)
Analog ground (0 V)
ADC input pin
Reference voltage pin 1
Connect a 0.1 µF ceramic capacitor between VRM and AVSS.
Reference voltage pin 3
Connect a 0.1 µF ceramic capacitor between VRT and AVSS.
Reference voltage pin 2
Connect a 0.1 µF ceramic capacitor between VRB and AVSS.
Rev.1.0 Apr 20, 2004 page 2 of 21
Analog(A) or
I/O Digital(D)
OD
—D
—D
I
D
—D
I
D
I
D
I
D
I
D
—A
—A
—A
—A
I
A
—A
—A
—A
—A
—A
—A
—A
—A