3825_03 Datasheet, PDF (194/339 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.5 Serial I/O
sTransmit shift register shift completion flag (bit 2)
When a shift operation (transmission of the first data bit) is started by shift clock after transmit data
is transferred to the transmit shift register, this flag is cleared to “0.” When the shift operation is
completed (completion of transmission of the last data bit), the flag is set to “1.”
This flag is valid in both the clock synchronous mode and the UART mode.
sOverrun error flag (bit 3)
If all the next receive data is input to the receive shift register when data has been input (not read
out) in the receive buffer register, this flag is set to “1” (occurrence of an overrun error). This flag is
set to “0” by one of the following operations.
•Set the serial I/O enable bit to “0”
•Set the receive enable bit to “0”
•Write data (arbitrary) into the serial I/O status register
This flag is valid in both the synchronous mode and the UART mode.
sParity error flag (bit 4)
In the UART mode, this flag checks an even parity or odd parity by hardware.
When the parity of received data is different from the set parity, this flag is set to “1.”
This flag is set to “0” by one of the following operations.
•Set the receive enable bit to “0”
•Write data (arbitrary) into the serial I/O status register
This flag is valid only in the parity enable state in the UART mode.
sFraming error flag (bit 5)
In the UART mode, this flag judges whether frame synchronization is abnormal.
When the stop bit of receive data cannot be received at the set timing, this flag is set to “1.”
This flag is set to “0” by one of the following operations.
•Set the receive enable bit to “0”
•Write data (arbitrary) into the serial I/O status register
This flag is valid only in the UART mode.
sSumming error flag (bit 6)
This flag is set to “1” when an overrun error, parity error, or framing error occurs.
This flag is set to “0” by one of the following operations.
•Set the receive enable bit to “0”
•Write data (arbitrary) into the serial I/O status register
This flag is valid in both the clock synchronous mode and the UART mode.
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3825 GROUP USER’S MANUAL