3825_03 Datasheet, PDF (106/339 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.3 Timer X and timer Y
(2) Pulse output mode
The operation in the pulse output mode is the same as that in the timer mode, besides, which is added
a pulse output operation. In this mode, a pulse whose polarity is reversed at every the X counter
underflow is output from the P54/CNTR0 pin.
Operation in the pulse output mode is described below.
ŒStart of count operation
Immediately after reset release, the timer X stop control bit is in the “0” state. For this reason, the
count operation is automatically started after reset release.
The value of the X counter is decremented by 1 each time a count source is input.
The count source is f(XIN)/16 clock (low-speed mode ; f(XCIN)/16 clock).
Reload operation
The X counter underflows at the first count pulse after the value of the X counter reaches “0016.”
At this time, the value of the X latch is transferred (reloaded) to the X counter.
ŽPulse output
A pulse whose polarity is reversed every the X counter underflow is output from the P54/CNTR0 pin.
As a level at a start of pulse output, a “H” or “L” is selected by the CNTR0 active edge switch bit.
At the time when the pulse output mode is selected by the timer X operating mode bits, a pulse
output is started.
Interrupt operation
sCounter underflow
An interrupt request occurs at the X counter underflow. At the same time, the timer X interrupt
request bit is set to “1.” The occurrence of an interrupt is controlled by the timer X interrupt enable
bit.
sEdge of pulse output
At the edge of the pulse output from the P54/CNTR0 pin, an interrupt request occurs. At the same
time, the CNTR0 interrupt request bit is set to “1.” The occurrence of an interrupt is controlled by
the CNTR0 interrupt enable bit.
As an active edge, the falling edge ( ) or rising edge ( ) is specified by the CNTR0 active edge
switch bit.
Stop of count operation
By writing “1” to the timer X stop control bit by software, the count operation is stopped.
The count operation is continued until “1” is set to the timer X stop control bit.
Figure 2.3.2 shows a pulse output mode operation example.
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3825 GROUP USER’S MANUAL