R1EX25002ASA00G Datasheet, PDF (18/22 Pages) Renesas Technology Corp – Serial Peripheral Interface 2k EEPROM 4k EEPROM

R1EX25002ASA00G/R1EX25004ASA00G/R1EX25002ATA00G/R1EX25004ATA00G
Notes
Data Protection at V_CC On/Off
When V_CC is turned on or off, noise on S inputs generated by external circuits (CPU, etc) may act as a trigger and turn
the EEPROM to unintentional program mode. To prevent this unintentional programming, this EEPROM have a power
on reset function. Be careful of the notices described below in order for the power on reset function to operate correctly.
 S should be fixed to V_CC during V_CC on/off. Low to high or high to low transition during V_CC on/off may
cause the trigger for the unintentional programming.
 V_CC should be turned on/off after the EEPROM is placed in a standby state.
 V_CC should be turned on from the ground level (V_SS) in order for the EEPROM not to enter the unintentional
programming mode.
 V_CC turn on rate should be slower than 2 s/V.
 When WRSR or WRITE instruction is executed before V_CC turns off, V_CC should be turned off after waiting
write cycle time (t_W).
Power Source Noise Countermeasures
In order to suppress power-source-noise which causes malfunction of the device, it is recommended to put 0.1uF
bypass-capacitor (such as a monolithic ceramic capacitor which has good high-frequency characteristics) between V_CC
and V_SS, and shorten the wiring length between the capacitor and V_CC/V_SS terminals as much as possible.
R10DS0034EJ0100 Rev.1.00
Feb. 25, 2013
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