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R1EX25002ASA00G Datasheet, PDF (10/22 Pages) Renesas Technology Corp – Serial Peripheral Interface 2k EEPROM 4k EEPROM
R1EX25002ASA00G/R1EX25004ASA00G/R1EX25002ATA00G/R1EX25004ATA00G
Write Enable (WREN):
The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction. The only way to do this is
to send a Write Enable instruction to the device. As shown in the following figure, to send this instruction to the device,
chip select (S) is driven low, and the bits of the instruction byte are shifted in, on serial data input (D). The device then
enters a wait state. It waits for the device to be deselected, by chip select (S) being driven high.
Write Enable (WREN) Sequence
VIH
S
VIL
VIH
W
VIL
C
VIH
VIL
D
VIH
VIL
0 123 456 7
Instruction
Q
High-Z
R10DS0034EJ0100 Rev.1.00
Feb. 25, 2013
Page 10 of 20