R1EX25002ASA00G Datasheet, PDF (11/22 Pages) Renesas Technology Corp – Serial Peripheral Interface 2k EEPROM 4k EEPROM

R1EX25002ASA00G/R1EX25004ASA00G/R1EX25002ATA00G/R1EX25004ATA00G
Write Disable (WRDI):
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction to the device. As shown
in the following figure, to send this instruction to the device, chip select (S) is driven low, and the bits of the instruction
byte are shifted in, on serial data input (D).
The device then enters a wait state. It waits for the device to be deselected, by chip select (S) being driven high. The
Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:
 Power-up
 WRDI instruction execution
 WRSR instruction completion
 WRITE instruction completion
 WRITE protect (W) is driven low
Write Disable (WRDI) Sequence
V_IH
S
V_IL
V_IH
W
V_IL
C
V_IH
V_IL
D
V_IH
V_IL
0 1 2 345 6 7
Instruction
Q
High-Z
R10DS0034EJ0100 Rev.1.00
Feb. 25, 2013
Page 11 of 20