M37735S4LHP Datasheet, PDF (18/37 Pages) Mitsubishi Electric Semiconductor – 16-BIT CMOS MICROCOMPUTER

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MITSUBISHI MICROCOMPUTERS
M37735S4LHP
16-BIT CMOS MICROCOMPUTER
ABSOLUTE MAXIMUM RATINGS
Symbol
Vcc
AVcc
VI
VI
VO
Pd
Topr
Tstg
Parameter
Conditions
Power source voltage
Analog power source voltage
_____
Input voltage RESET, CNVss, BYTE
Input voltage P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7,
P43 – P47, P50 – P57, P60 – P67, P70 – P77,
____ ___
P80 – P87, VREF, XIN, HOLD, RDY
___
Output voltage P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,
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____
P20/A0/D0 – P27/A7/D7, P30/WEL – P33/HLDA ,P42/ 1,
P43 – P47, P50 – P57, P60 – P67, P70 – P77, P80 – P87,
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XOUT, RDE
Power dissipation
Ta = 25 °C
Operating temperature
Storage temperature
Ratings
Unit
–0.3 to +7
V
–0.3 to +7
V
–0.3 to +12
V
–0.3 to Vcc + 0.3
V
–0.3 to Vcc + 0.3
V
200
mW
–40 to +85
°C
–65 to +150
°C
RECOMMENDED OPERATING CONDITIONS (Vcc = 2.7 – 5.5 V, Ta = –40 to +85 °C, unless otherwise noted)
Symbol
Vcc
AVcc
Vss
AVss
VIH
VIH
VIL
VIL
IOH(peak)
IOH(avg)
IOL(peak)
IOL(peak)
IOL(avg)
IOL(avg)
f(XIN)
f(XCIN)
Parameter
Power source voltage
f(XIN) : Operating
f(XIN) : Stopped, f(XCIN) = 32.768 kHz
Analog power source voltage
Power source voltage
Analog power source voltage
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High-level input voltage HOLD, RDY, P43 – P47, P50 – P57, P60 – P67, P70 – P77,
_____
P80 – P87, XIN, RESET, CNVss, BYTE, XCIN (Note 3)
High-level input voltage P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7
____ ___
Low-level input voltage HOLD, RDY, P43 – P47, P50 – P57, P60 – P67, P70 – P77,
_____
P80 – P87, XIN, RESET, CNVss, BYTE, XCIN (Note 3)
Low-level input voltage P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7
___
High-level peak output current P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,
___
____
P20/A0/D0 – P27/A7/D7, P30/WEL – P33/HLDA,
P42/ 1, P43 – P47, P50 – P57, P60 – P67,
P70 – P77, P80 – P87
___
High-level average output current P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,
___
____
P20/A0/D0 – P27/A7/D7, P30/WEL – P33/HLDA,
P42/ 1, P43 – P47, P50 – P57, P60 – P67,
P70 – P77, P80 – P87
___
Low-level peak output current P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,
___
____
P20/A0/D0 – P27/A7/D7, P30/WEL – P33/HLDA,
P42/ 1, P43, P54 – P57, P60 – P67, P70 – P77,
P80 – P87
Low-level peak output current P44 – P47, P50 – P53
___
Low-level average output current P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,
___
____
P20/A0/D0 – P27/A7/D7, P30/WEL – P33/HLDA,
P42/ 1, P43, P54 – P57,P60 – P67, P70 – P77,
P80 – P87
Low-level average output current P44 – P47, P50 – P53
Main-clock oscillation frequency (Note 4)
Sub-clock oscillation frequency
Min.
2.7
2.7
0.8 Vcc
0.5 Vcc
0
0
Limits
Typ.
Vcc
0
0
Max.
Unit
5.5
5.5
V
V
V
V
Vcc
V
Vcc
V
0.2Vcc V
0.16Vcc V
–10
mA
–5
mA
32.768
10
mA
16
mA
5
mA
12
mA
12 MHz
50 kHz
Notes 1. Average output current is the average value of a 100 ms interval.
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___
____
2. The sum of IOL(peak) for ports P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7, P30/WEL – P33/HLDA and P8 must
___
___
be 80 mA or less, the sum of IOH(peak) for ports P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7, P30/WEL – P33/
____
HLDA and P8 must be 80 mA or less, the sum of IOL(peak) for ports P4, P5, P6, and P7 must be 100 mA or less, and the sum of IOH(peak)
for ports P4, P5, P6, and P7 must be 80 mA or less.
3. Limits VIH and VIL for XCIN are applied when the sub clock external input selection bit = “1”.
4. The maximum value of f(XIN) = 6 MHz when the main clock division selection bit = “1”.
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